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Recent Papers

  1. U. F. Siddiqi, K.C. Cheng, G. Grewal and S. Areibi
    Enhancing K-way Circuit Partitioning: A Deep Reinforcement Learning Methodology
    In International Conference on Optimization, Learning Algorithms and Applications, Spain, July, 2024.
  2. U. F. Siddiqi, G. Grewal and S. Areibi
    A Recursive Partitioning Approach to Improving Hypergraph Partitioning
    In Canadian Conference on Electrical and Computer Engineering, Kingston, Ontario, Canada, August, 2024.
  3. T. Martin, D. Maarouf, G. Grewal and S. Areibi
    A High-Performance Routing Engine for Large-Scale FPGAs
    In International Conference on Field-Programmable Logic and Applications (FPL), Turin, Italy, Sept. 2024.
  4. C. Barnes, S. Vermuelen, S. Areibi, and G. Grewal
    An Adaptive Analytical FPGA Placement flow based on Reinforcement Learning
    In 2023 International Conference on Microelectronics (ICM), Abu Dhabi, United Arab Emirates, December 2023
  5. T. Martin, Q. Li, C. Barnes, G. Grewal, and S. Areibi
    A Deep-Learning Data-Driven Approach for Reducing FPGA Routing Runtimes
    In 2023 International Conference on Field Programmable Technology (ICFPT), Yokohama, Japan, December 2023
  6. U. Siddiqi, S. Areibi, and G. Grewal
    A Deterministic Parallel Routing Approach for Accelerating Pathfinder-based Algorithms
    In 31st IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Sharjah, United Arab Emirates, October 2023
  7. T. Martin, C. Barnes, G. Grewal, and S. Areibi
    FPGA Placement: Dynamic Decision Making Via Machine Learning
    In 2023 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI), Rio de Janeiro, Brazil, August 2023
  8. T. Martin, C. Barnes, G. Grewal, and S. Areibi
    Integrating Machine-Learning Probes in FPGA CAD: Why and How?
    In IEEE Design & Test, V. 40, Issue 5, pp: 7-14, June 2023.
  9. T. Martin, C. Barnes, S. Areibi, and G. Grewal
    An Adaptive Sequential Decision Making Flow for FPGAs using Machine Learning
    2022 International Conference on Microelectronics (ICM), Casablanca, Morocco, December 2022
  10. P. Esmaeili, T. Martin, S. Areibi, and G. Grewal
    Guiding FPGA Detailed Placement via Reinforcement Learning
    2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC), Patras, Greece, October 2022
  11. U. Siddiqi, T. Martin, S. Van Den Eijnden, A. Shamli, G. Grewal, S. Sait, and S. Areibi
    Faster FPGA Routing by Forecasting and Pre-Loading Congestion Information
    For Proceedings of the 2022 ACM/IEEE Workshop on Machine Learning for CAD, Snowbird, Utah, USA, September 2022.
  12. T. Martin, C. Barnes, G. Grewal, and S. Areibi
    Integrating Machine-Learning Probes into the VTR FPGA Design Flow
    In 2022 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI), Porto Alegre, Brazil, August 2022.
  13. M. Fathi, T. Martin, G. Grewal, and S. Areibi
    Using Machine Learning to Predict Operating Frequency During Placement in FPGA Designs
    In 2021 International Conference on Microelectronics (ICM), Cairo, Egypt, December 2021
  14. T. Martin, S. Areibi, and G. Grewal
    Effective Machine-Learning Models for Predicting Routability During FPGA Placement
    In 2021 ACM/IEEE 3rd Workshop on Machine Learning for CAD (MLCAD), Raleigh, North Carolina, USA
  15. A. Al-Hyari, H. Szentimrey, A. Shamli, T. Martin, G. Grewal, and S. Areibi
    A Deep Learning Framework to Predict Routability for FPGA Circuit Placement
    In ACM Transactions on Reconfigurable Technology and Systems (TRETS), V. 14, Issue 3, Article 16, August 2021
  16. T. Martin, G. Grewal, and S. Areibi
    A Machine Learning Approach to Predict Timing Delays During FPGA Placement
    In 2021 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), Portland, Oregon, USA, June 2021
  17. A. Al-Hyari, A. Shamli, T. Martin, S. Areibi, G. Grewal
    An Adaptive Analytic FPGA Placement Framework based on Deep-Learning
    In Proceedings of the 2020 ACM/IEEE Workshop on Machine Learning for CAD, Virtual Event, Iceland, November 2020
  18. D. Maarouf, A. Shamli, T. Martin, G. Grewal, and S. Areibi
    A deep-learning framework for predicting congestion during FPGA placement
    In 2020 30th International Conference on Field-Programmable Logic and Applications (FPL), Virtual, August 2020
  19. H. Szentimrey, A. Al-Hyari, J. Foxcroft, T. Martin, D. Noel, G. Grewal, and S. Areibi
    Machine Learning for Congestion Management and Routability Prediction within FPGA Placement
    ACM Transactions on Design Automation of Electronic Systems (TODAES), V. 25, Issue 5, pp: 1-25, August 2020
  20. J. Foxcroft, G. Grewal, and S. Areibi
    Enhancing the Performance of FPGA Congestion Management via Supervised Learning
    2019 31st International Conference on Microelectronics (ICM), Cairo, Egypt, December 2019
  21. A. Al-Hyari, A. Shamli, Z. Abuowaimer, G. Grewal, and S. Areibi
    A Deep Learning Framework to Predict Routability for FPGA Circuit Placement
    In 29th International Conference on Field Programmable Logic and Applications (FPL), Barcelona, Spain, September 2019
    Winner of the 2019 Michal Servit Award for Best Paper
  22. A. Al-Hyari, Z. Abuowaimer, T. Martin, G. Gréwal, S. Areibi, and A. Vannelli
    Novel Congestion-estimation and Routability-prediction Methods based on Machine Learning for Modern FPGAs
    In ACM Transactions on Reconfigurable Technology and Systems (TRETS), V. 12, Issue 3, pp: 1-25, August 2019
  23. T. Martin, D. Maarouf, Z. Abuowaimer, A. Al-Hyari, G. Grewal, and S. Areibi
    A Flat Timing­Driven Placement Flow for Modern FPGAs
    In Proceedings of the 56th Annual Design Automation Conference 2019, Las Vegas, Nevada, USA, June 2019
  24. A. Al-Hyari, Z. Abuowaimer, D. Maarouf, S. Areibi, and G. Grewal
    An Effective FPGA Placement Flow Selection Framework using Machine Learning
    In Proceedings of the 30th International Conference on Microelectronics (ICM), Sousse, Tunisia, December 2018
  25. D. Maarouf, A. Alhyari, Z. Abuowaimer, T. Martins, A. Gunter, G. Grewal, S. Areibi, and A. Vannelli
    A Machine-Learning Congestion-Estimation Model for Modern FPGAs
    In International Conference on Field Programmable Logic & Applications (FPL 2018), Dublin, Ireland, 27th August, 2018
    Winner of the 2018 Michal Servit Award for Best Paper
  26. Z. Abuowaimer, D. Maarouf, T. Martin, J. Foxcroft, G. Grewal, S. Areibi and A. Vannelli
    'GPlace3.0: Routability-Driven Analytic Placer for UltraScale FPGA Architectures'
    ACM Transactions on Design Automation of Electronic Systems (TODAES), V. 24, Issue 5, August 2018.
  27. D. Jamma, O. Ahmed, G. Grewal, and S. Areibi
    'Hardware Accelerators for the K-Nearest Neighbor Algorithm using High Level Synthesis'
    In 29th International Conference on Microelectronics, Beirut, Lebanon, December 2017.
  28. G. Grewal, S. Areibi, M. Westrik, Z. Abuowaimer and B. Zhao
    'Automatic Flow Selection and Quality-of-Result Estimation for FPGA Placement'
    In 24th Reconfigurable Architectures Workshop, Orlando, Florida, USA, May 2017.
    (Best Paper Award)
  29. G. Grewal, S. Areibi, M. Westrik, Z. Abuowaimer and B. Zhao
    `A Machine Learning Framework for FPGA CAD'
    Poster in ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Monterey California, February 2017.
  30. A. Al-Wattar and S. Areibi and G. Grewal
    An Efficient Evolutionary Task Scheduling/Binding Framework for Reconfigurable Systems
    Journal of Reconfigurable Computing, Volume 2016, Article ID 9012909, pp: 1 -24, March 2016.
  31. D. Jamma, O. Ahmed, S. Areibi, G. Grewal and N. Molloy
    'Design Exploration of ASIP Architectures for the K-Nearest Neighbor Machine-Learning Algorithm'
    In IEEE International Conference on Microelectronics, Cairo Egypt, December 2016.
  32. R. Pattison, Z. Abuowaimer, S. Areibi, G. Grewal and A. Vannelli
    'Invited Paper: GPlace - A Congestion-aware Placement tool for UltraScale FPGAs'
    In IEEE International Conference on Computer Aided Design, Austin Texas, November 2016.
  33. M. Elmahguibi, O. Ahmed, S. Areibi and G. Grewal
    Efficient AlgorithmSelection for Packet Classification using Meta-Learning
    In 21st IEEE International Workshop on Computer Aided Modelling and Design of Communication links and Networks, Toronto Canada, pp:24-30, October 2016.
  34. R. Pattison, S. Areibi and G. Grewal
    'Scalable Analytic Placement for FPGA on GPGPU'.
    In International Conference on Reconfigurable Computing and FPGAs, Cancun, Mexico, pp:1-6, December 2015.
  35. A. Al-Wattar, S. Areibi and G. Grewal
    'Efficient mapping of Execution Units to Task Graphs using an Evolutionary Framework'.
    In International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies (HEART), Boston, MA, USA, pp: , June 2015.
  36. A. Al-Wattar and S. Areibi and G. Grewal
    An Efficient Framework for Floor-plan Prediction of Dynamic Runtime Reconfigurable Systems
    International Journal of Reconfigurable and Embedded systems (IJRES), Vol. 4, No. 2, pp: 99-121, July 2015.
  37. R. Collier, C. Fobel, R. Pattison, G. Grewal, S. Areibi
    Advancing Genetic Algorithm Approaches to Field Programmable Gate Array Placement with Enhanced Recombination Operators
    Evolutionay Intelligence, Volume 2014, DOI: 10.1007/s12065-014-0114-6, pp: 183-200, October 2014.
  38. O. Ahmed, S. Areibi, R. Collier and G. Grewal
    An Impulse-C Hardware Accelerator for Packet Classification based on Fine/Coarse Grain Optimization
    International Journal of Reconfigurable Computing, Volume 2013, Article ID 130765, pp:1-23, July 2013.
  39. O. Ahmed, S. Areibi and G. Grewal
    Hardware Accelerators Targeting a Novel Group Based Packet Classification Algorithm
    International Journal of Reconfigurable Computing, Volume 2013, Article ID 681894, pp:1-33, Feb 2013.
  40. B. Debowski and S. Areibi and G. Grewal and J. Tempelman
    'A Dynamic Sampling Framework for Multi-Class Imbalanced Data'.
    International Conference on Machine Learning and Applications (ICMLA 2012), Boca Raton, Florida, USA, pp: 113-118, December 2012.
  41. S. Sheikh-Nia and G. Grewal and S. Areibi
    'A Sequential Ensemble Classification (SEC) System for Tackling the Problem of Unbalnce Learning: A Case Study'.
    International Conference on Machine Learning and Applications (ICMLA 2012), Boca Raton, Florida, USA, pp: 72-77, December 2012.
  42. M.Walton, O. Ahmed, S. Areibi and G. Grewal
    An Empirical Investigation on System/Statement Level Parallelism Strategies for Accerating Scatter Search using Handel-C and ImpulseC
    Journal of VLSI Design, Volume 12, No. 5, Pages: 1-11, January 2012.
  43. M. Xu, G. Grewal, S. Areibi
    StarPlace: A New Analytic Method for FPGA Placement
    Integration The VLSI Journal, Volume 44, Issue 3, Pages: 192-204, June 2011.
  44. E. Armstrong, G. Grewal, S. Areibi and G. Darlington
    'An Investigation of Parallel Memetic Algorithms for VLSI Circuit Partitioning on Multi-Core Computers'.
    IEEE Canadian Conference on Electrical and Computer Engineering, CCECE'10, Calgary, Canada, pp:1-6, May 2010.
  45. M. Ghazali, S. Areibi, G. Grewal, A. Erb, J. Spenceley
    'A Comparison of Hardware Acceleration Methods for VLSI Maze Routing'.
    Symposium on Electronic Design Automation, Toronto, Canada, pp: 563-568, May 2009.
  46. M. Xu, G. Grewal, S. Areibi, C. Obimbo and D. Banerji
    Near linear Wirelength Estimation for FPGA Placement
    Canadian Journal of Electrical and Computer Engineering, Volume:34, Number:3, pages:125-132, Summer 2009.
  47. S. Areibi, X. Bao, G. Grewal, D. Banerji and P. Du
    Meta-Heuristic Based Techniques for FPGA Placement: A Study
    International Journal of Computers and Applications, Vol. 16, No. 1, pp:13-33, March 2009.
  48. S. Areibi, G. Grewal, D. Banerji and P. Du
    Hierarchical FPGA Placement
    Canadian Journal on Electrical and Computer Engineering, Vol. 32, No. 1, pp: 53-64, Winter 2007.
  49. P. Du, G. Grewal, S. Areibi and D. Banerji
    A Fast Hierarchical Approach to FPGA Placement
    Proceedings of the International Conference on Embedded Systems & Applications (ESA'04), Las Vegas Nevada, USA, pp: 497-503, June 2004
  50. P. Du, G. Grewal, S. Areibi and D. Banerji
    A Fast Adaptive Heuristic for FPGA Placement
    The 2nd Annual IEEE Northwest Workshop on Circuits and Systems, Montreal Canada, pp: 373-376, June 2004